1. Technical Field
The present invention is related to an LCD driving circuit and related driving method, and more particularly, to an LCD driving circuit and related driving method capable of improving cold-start.
2. Related Art
Liquid crystal display (LCD) devices, characterized in low radiation, thin appearance and low power consumption, have gradually replaced traditional cathode ray tube (CRT) displays and been widely used in notebook computers, personal digital assistants (PDAs), flat-panel TVs, or mobile phones. In a traditional LCD device, images are displayed by driving the pixels on an LCD panel using external source drivers and gate drivers. Recently, GOA (gate driver on array) technology has been developed in which the gate drivers are integrated in the LCD panel.
FIG. 1 is a diagram illustrating a prior art LCD device 100 using GOA technology. The LCD device 100 includes a display panel 110, a timing controller 120, a source driver 130, and a gate driver 140. A plurality of data lines DL1-DLM, a plurality of gate lines GL1-GLN, and a pixel array having a plurality of pixel units PX are disposed on the display panel 110. Each pixel unit PX, having a thin film transistor switch TFT, a liquid crystal capacitor CLC and a storage capacitor CST, is coupled to a corresponding data line, a corresponding gate line, and a common voltage VCOM. The timing controller 120 is configured to generate signals for operating the source driver 130 and the gate driver 140, such as a start pulse signal VST and clock signals CK1-CKN. The source driver 130 is configured to generate data driving signals SD1-SDM associated with display images, thereby charging the corresponding pixel units PX. The gate driver 140 includes a plurality of shift register units SR1-SRN coupled in series and configured to sequentially output gate driving signals SG1-SGN to the corresponding gate lines GL1-GLN according to the clock signals CK1-CKN and the start pulse signal VST, thereby turning on the thin film transistor switches TFT in the corresponding pixel units PX.
In the prior art LCD device 100, each shift register unit selectively transmits the same clock signal to its output end and its corresponding next-stage shift register unit. In other words, the 1st to Nth-stage shift register units SR1-SRN−1 also generate forward driving signals SF1-SFN−1 for respectively triggering the corresponding next-stage shift register units SR2-SRN (the 1st-stage shift register unit SR1 is triggered by the start pulse signal VST).
FIG. 2 is a diagram illustrating an nth-stage shift register unit SRn among the prior art shift register units SR1-SRN. The prior art shift register unit SRn includes an output end OUTn, a node Qn, an input circuit 12, a pull-up circuit 14, a forward circuit 16, a first pull-down circuit 21, and a second pull-down circuit 22. The shift register unit SRn is configured to output the gate driving signal SGn to the gate line GLn at its output end OUTn.
The pull-up circuit 14 includes a transistor switch T1 having a control end coupled to the node Qn, a first end coupled to the clock signal CKn, and a second end coupled to the output end OUTn. The forward circuit 16 includes a transistor switch T2 having a control end coupled to the node Qn, a first end coupled to the clock signal CKn, and a second end coupled to the (n+1)th-stage shift register unit SRn+1. When the voltage level of the node Qn exceeds the turn-on voltage of the transistor switch T1, the clock signal CKn is transmitted to the output end Qn via the conducting transistor switch T1 for supplying the gate driving signal SGn. When the voltage level of the node Qn exceeds the turn-on voltage of the transistor switch T2, the clock signal CKn is transmitted to the (n+1)th-stage shift register unit SRn+1 via the conducting transistor switch T2 for supplying the forward driving signal SFn. The transistor switch T1 for providing gate driving signals normally has a much larger width/length (W/L) ratio than the transistor switch T2 for providing forward driving signals.
In GOA technology, the shift register units SR1-SRN are manufactured in TFT processes. The turn-on current ION of a thin film transistor switch is proportional to its W/L ratio, applied gate voltage VGH and the environmental temperature. Since the turn-on speed of the thin film transistor slows down as the temperature decreases, the shift register units SR1-SRN suffers from cold-start in low-temperature environment (such as at the beginning of the start-up sequence). As previously illustrated, the transistor switch T2 with a much smaller W/L ratio encounters a larger fluctuation in turn-on current ION, resulting in a more deteriorated forward driving current which may not be able to trigger the corresponding next-stage shift register unit properly in low-temperature environment.
In low-temperature environment, the gate voltage VGH of the thin film transistor switch may be raised for increasing the turn-on current ION in the prior art. For example, in the LCD device 100 illustrated in FIG. 1, the timing controller may includes a counter.
When starting to activate the shift register units SR1-SRN, the timing controller 120 is configured to output clock signals CK1-CKN having larger pulse amplitude for increasing the gate voltages VGH supplied to the transistor switches T1 and T2. After the counter determines that the shift register units SR1-SRN have been activated over a predetermined period of time, the timing controller 120 is configured to output clock signals CK1-CKN having smaller pulse amplitude.
In the prior art, cold-start may be improved by switching between clock signals having two different pulse when driving the shift register units amplitudes. However, the sudden voltage change in gate voltage when the switching the clock signals result in voltage feed through, which may cause image flicker and influence display quality.